1. Field of the Invention
The instant disclosure relates to a level shift circuit; in particular, to a current-limited level shift circuit having multiple output terminals.
2. Description of Related Art
Please refer to FIG. 1 showing a circuit diagram of a conventional level shift circuit. The conventional level shift circuit 1 has a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first NMOS transistor and a second NMOS transistor. The conventional level shift circuit 1 converts the signal from the first input terminal IN1 and the second input terminal IN2 to the signal at the output terminal Out2 and the output terminal Out1. In FIG. 1, the output terminal Out1 is connected to the input terminal of the CMOS inverter 110, wherein the CMOS inverter 110 is a second stage circuit, and the output terminal of the CMOS inverter is the second stage output terminal OutS, in which the second stage output terminal OutS generates the signal which is inverted of the signal of the output terminal Out1.
However, large current generated by the conventional level shift circuit 1 during the state transition usually increases the power consumption of the circuit. And, the conventional level shift circuit 1 only has the one to one corresponding output terminals Out1 and Out2 which only provide single type of output signal, thus the conventional level shift circuit 1 has very limited applications. Therefore, it is still needed to improve the conventional level shift circuit 1.